DM9000EP

single chip, Fast Ethernet MAC controller, QFP100

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Price:: US $1.00~20.00 / piece [Get Latest Price]

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	US $1.00~20.00

PartNumber:: DM9000EP

Brand:: Davicom Semiconductor,Inc. - Davicom | Pack: QFP | D/C: 09+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Total Price:: US $0

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Products Upload time: 2011-03-04

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Part Number:DM9000EP
US $1.00 - 20.00
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Product Summary

The DM9000EP is a fully integrated and cost-effective single chip Fast Ethernet MAC controller with a general processor interface, a 10/100M PHY and 4K Dword SRAM. It is designed with low power and high performance process that support 3.3V with 5V tolerance. The DM9000EP also provides a MII interface to connect HPNA device or other transceivers that support MII interface. The DM9000EP supports 8-bit, 16-bit and 32-bit uP interfaces to internal memory accesses for different processors.

Parametrics

Absolute maximum ratings: (1)DVDD AVDD, Supply Voltage: -0.3 to 3.6 V; (2)VIN, DC Input Voltage (VIN): -0.5 to 5.5 V; (3)VOUT, DC Output Voltage(VOUT): -0.3 to 3.6 V; (4)Tstg, Storage Temperature Rang (Tstg): -65 to +150 ℃ at EIAJ-4701; (5)TA, Ambient Temperature: 0 +70 ℃; (6)LT, Lead Temp. (TL, Soldering, 10 sec.): 235 ℃ max at Pb-Free; (7)ESD, ESD rating (Rzap=1.5k Czap=100PF): 3000 V max at Human Body Model.

Features

Features: (1)Supports processor interface: byte/word/dword of I/O command to internal memory data operation; (2)Integrated 10/100M transceiver; (3)Supports MII and reverses MII interface; (4)Supports back pressure mode for half-duplex mode flow control; (5)IEEE802.3x flow control for full-duplex mode; (6)Supports wakeup frame, link status change and magic packet events for remote wake up; (7)Integrated 4K dword SRAM; (8)Supports automatically load vendor ID and product ID from EEPROM; (9)Supports 4 GPIO pins; (10)Optional EEPROM configuration; (11)Very low power consumption mode: Power reduced mode (cable detection); Power down mode; Selectable TX drivers for 1:1 or 1.25:1 transformers for additional power reduction.; (12)Compatible with 3.3V and 5.0V tolerant I/O; (13)100-pin LQFP with CMOS process.