Product Summary
The K9F1G08U0A is a 128M x 8 Bit memory organized as 65,536 rows(pages) by 2112x8 columns. Spare 64 columns are located from column address of 2048~2111. A 2112-byte data register and a 2112-byte cache register are serially connected to each other. The serially connected register of the K9F1G08U0A is connected to memory cell arrays for accommodating data transfer between the I/O buffers and memory cells during page read and page program operations. The memory array is made up of 32 cells that are serially connected to form a NAND structure. Each of the 32 cells resides in a different page. A block consists of two NAND structured strings. A NAND structure of the K9F1G08U0A consists of 32 cells. Total 1081344 NAND cells reside in a block. The program and read operations are executed on a page basis, while the erase operation is executed on a block basis. The memory array consists of 1024 separately erasable 128K-byte blocks. It indicates that the bit by bit erase operation is prohibited on the K9F1G08U0A.
Parametrics
K9F1G08U0A absolute maximum ratings: (1)VIN/OUT -0.6 to + 4.6V; (2)VCC -0.6 to + 4.6; (3)TBIAS -10 to +125 ℃; (4)TSTG -65 to +150 ℃; (5)Ios 5 mA.
Features
K9F1G08U0A features: (1)Fast Write Cycle Time: Program time: 300ms(Typ.); Block Erase Time: 2ms(Typ.); (2)Command/Address/Data Multiplexed I/O Port; (3)Hardware Data Protection: Program/Erase Lockout During Power Transitions; (4)Reliable CMOS Floating-Gate Technology; Endurance: 100K Program/Erase Cycles; Data Retention: 10 Years; (5)Command Register Operation; (6)Cache Program Operation for High Performance Program; (7)Intelligent Copy-Back Operation; (8)Unique ID for Copyright Protection.
Diagrams
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K9F1208D0A |
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K9F1208Q0A-XXB0 |
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K9F1208Q0B |
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K9F1208R0B |
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K9F1208U0A |
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K9F1208U0A-VCB0 |
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