Product Summary

The K4S281632I-UC75 is a 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 ×8,388,608 words by 4 bits / 4 × 4,194,304 words by 8 bits / 4 × 2,097,152 words by 16 bits, fabricated with SAMSUNG’s high perfor- mance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the K4S281632I-UC75 to be useful for a variety of high bandwidth, high performance memory system applications.

Parametrics

K4S281632I-UC75 absolute maximum ratings: (1)Voltage on any pin relative to Vss, VIN, VOUT: -1.0 ~ 4.6 V; (2)Voltage on VDD supply relative to Vss, VDD, VDDQ: -1.0 ~ 4.6 V; (3)Storage temperature, TSTG: -55 ~ +150℃; (4)Power dissipation, PD: 1W; (5)Short circuit current, IOS: 50 mA.

Features

K4S281632I-UC75 features: (1)JEDEC standard 3.3V power supply; (2)LVTTL compatible with multiplexed address; (3)Four banks operation ; (4)MRS cycle with address key programs: CAS latency (2 & 3);Burst length (1, 2, 4, 8 & Full page); Burst type (Sequential & Interleave); (5)All inputs are sampled at the positive going edge of the system clock; (6)Burst read single-bit write operation; (7)DQM (x4,x8) & L(U)DQM (x16) for masking; (8)Auto & self refresh; (9)64ms refresh period (4K Cycle); (10)RoHS compliant for Pb-free Package.

Diagrams

K4S281632I-UC75 functional block diagram

Image Part No Mfg Description Data Sheet Download Pricing
(USD)		 Quantity
K4S281632I-UC75
K4S281632I-UC75
Other

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Negotiable 
Image Part No Mfg Description Data Sheet Download Pricing
(USD)		 Quantity
K4S280432A
K4S280432A
Other

Data Sheet
Negotiable 
K4S280432B
K4S280432B
Other

Data Sheet
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K4S280432C
K4S280432C
Other

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Negotiable 
K4S280432E-TC(L)75
K4S280432E-TC(L)75
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Negotiable 
K4S280432F
K4S280432F
Other

Data Sheet
Negotiable 
K4S280432F-TC(L)75
K4S280432F-TC(L)75
Other

Data Sheet
Negotiable